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Searching for Optmal Synchronizing Sequences for Testng Logic CircuitsSearching for Optmal Synchronizing Sequences for Testng Logic Circuits
Модели прогнозирования надежности интегральных схем с учетом воздействия электростатического разряда отказов микросхем.
The models for predicting the reliability of integrated circuits with regard
Image stitching algorithm for description of integrated circuit layouts in the system of integrated circuit layout analyses.
Analogue integrated circuits design-for-testability flow oriented onto OBIST strategy for analog integrated circuits (IC). The design procedures according to DFT flow are proposed. Three possible
An approach to design-for-testability automation of analogue integrated circuits using OBIST strategy with emphasis on OBIST strategy for analog integrated circuits. The design procedures according to DFT flow
The brain is a nanoelectronic object created by Nature". Therefore the nearest analogue in artificial electronics is an integrated circuit (IC
Повышение информативности изображений слоев полупроводниковых микросхем the informativity of highly distorted images of integrated circuit layers to restore their topology are presented
Приборно-технологическое моделирование МОП-транзисторов в процессе иерархического проектирования интегральных микросхем of standard software systems for of integrated circuits design, in particular, the simulation
An approach to design-for-testability automation of analogue integrated circuits using OBIST strategy with emphasis on OBIST strategy for analog integrated circuits. The design procedures according to DFT flow
An approach to reducing complexity of neuromorphic fault dictionary construction for analogue integrated circuits constructing for analog integrated circuits based on neural network. The benefits of fault dictionary based
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