Развитие методов верификации прикладного программного обеспечения АСУ ТП АЭС на базе ТПТСThe development of applied software
verification methods in software and
hardware complexes
LTL-based verification of reconfigurable workflows for modeling and
verification of various types of
hardware (and software) systems. While most languages
LTL-based verification of reconfigurable workflows for modeling and
verification of various types of
hardware (and software) systems. While most languages
High-Level Design Flows for VLSI CircuitNepomnyashchy, Oleg V.,
Legalov, Alexander I.,
Sirotinina, Natalia J.,
Непомнящий, О.В.,
Легалов, А.И.,
Сиротинина, Н.Ю. and
verification allows developers to transfer initial high-level parallel
algorithms on topologies
The VLSI High-Level Synthesis for Building Onboard Spacecraft Control Systems trends in the aerospace field. Modular-network architectures implemented on the “system-on-chip”
hardware The VLSI high-level synthesis for building onboard spacecraft control systems trends in the aerospace field. Modular-network architectures implemented on the "system-on-chip"
hardware