Searching for Optmal Synchronizing Sequences for Testng Logic CircuitsThe problem under consideration is to find a
synchronizing sequence for a
logic network with memory
Masking internal node logical faults and trojan circuits injections with using SAT solversWe consider a combination
circuit (the combinational part of a sequential
circuit) and some nodes
Trojan Circuits masking and debugging of combinational circuits with LUT insertion. Manufactured
circuits may have
logical and electrical bugs, Trojan
Circuits (TCs) inclusions and so on
Masking circuit faults and Trojan circuit injections using sat solversCombinational
circuit C composed of gates and its sub-
circuit with set V of output nodes and set U
Логический коммутатор и запоминающее устройство на основе мемристорных ячеек для электрической схемы нейропроцессораМаевский, О. В.,
Писарев, А. Д.,
Бусыгин, А. Н.,
Удовиченко, С. Ю.,
Maevsky, O. V.,
Pisarev, A. D.,
Busygin,A. N.,
Udovichenko, S.Yu. The topology and the
circuit diagram of memristor cells obtained by integrating memristor, diodes
Deriving approximate logic circuits for TMR technique reliable functioning of
logic circuits. When using outsourcing, it is possible to inject a Trojan
Circuit