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Searching for Optmal Synchronizing Sequences for Testng Logic CircuitsThe problem under consideration is to find a synchronizing sequence for a logic network with memory

Masking internal node logical faults and trojan circuits injections with using SAT solversWe consider a combination circuit (the combinational part of a sequential circuit) and some nodes

Trojan Circuits masking and debugging of combinational circuits with LUT insertion. Manufactured circuits may have logical and electrical bugs, Trojan Circuits (TCs) inclusions and so on

Signature analysis of circuits with detection of single faults of built-in testing of combinational circuits is suggested that uses a linear sequential machine

Detection and masking of trojan circuits in sequential logicInserting malicious sub-circuits that may destroy a logical circuit or provide leakage

Asynchronous Linear Combinational Circuits as a Base for Programmable Logic Device. Binary and Ternary Cases© 2016Programmable logic devices on base of asynchronous combinational circuits with feedback

Signature analysis of circuits with detection of single faults of built-in testing of combinational circuits is suggested that uses a linear sequential machine

Detection and masking of Trojan Circuits in sequential logicA technique of finding a set of sequential circuit

Исследование влияния радиопомех на динамические параметры логических элементов parameters of logic elements is investigated. During the tests, the logic inverters were connected according

Asynchronous Linear Combinational Circuits as a Base for Programmable Logic Device. Binary and Ternary Cases© 2016Programmable logic devices on base of asynchronous combinational circuits with feedback

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